Truth table for system of four NAND gates as shown in figure is :

Engineering

Physics

Logic Gates New

Question

$\begin{matrix} A & B & Y \\ 0 & 0 & 1 \\ 0 & 1 & 0 \\ 1 & 0 & 0 \\ 1 & 1 & 1 \end{matrix}$

$\begin{matrix} A & B & Y \\ 0 & 0 & 0 \\ 0 & 1 & 0 \\ 1 & 0 & 1 \\ 1 & 1 & 1 \end{matrix}$

$\begin{matrix} A & B & Y \\ 0 & 0 & 0 \\ 0 & 1 & 1 \\ 1 & 0 & 1 \\ 1 & 1 & 0 \end{matrix}$

$\begin{matrix} A & B & Y \\ 0 & 0 & 1 \\ 0 & 1 & 1 \\ 1 & 0 & 0 \\ 1 & 1 & 0 \end{matrix}$

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The circuit uses four NAND gates. Let's analyze step by step. The output of first NAND (inputs A, B) is $\bar{A \cdot B}$ . This feeds two gates. One NAND with A gives $\bar{A \cdot \bar{A \cdot B}}$ , simplifying to $A + \bar{A \cdot B}$ . Similarly, the other with B gives $B + \bar{A \cdot B}$ . The final NAND combines these: Y = $\bar{(A + \bar{A \cdot B}) \cdot (B + \bar{A \cdot B})}$ . This simplifies to the XOR function: Y = A ⊕ B. The truth table for XOR is:

\begin{matrix} A & B & Y \\ 0 & 0 & 0 \\ 0 & 1 & 1 \\ 1 & 0 & 1 \\ 1 & 1 & 0 \end{matrix}

Final Answer: The third option is correct.